CMOS image sensor architecture for high-speed sparse image content readout

To address this issue, we propose an architecture for image sensor readout using a pipelined global shutter image sensor in which the readout is asynchronous and not scanned sequentially. Content aware pixels use a domino-like asynchronous readout and do not suffer from ambiguity during the decoding of the addresses. The analog data are then retrieved from the single pixels using the asynchronously read addresses.